1. Field of the Invention
The present invention relates to a photomask structure. More particularly, the present invention relates to a photomask structure that can prevent a side lobe effect.
2. Description of the Related Art
For earliest photomasks, all patterns thereon are formed from a chromium film. In a lithography process using such a photomask, the exposure light is reflected by the Cr-portions but passes the chromeless portions to transfer the photomask patterns to a photoresist layer on a wafer. However, after the process line width was reduced, many phase shift techniques were developed to improve the lithographic resolution.
Among various phase shift masks (PSM), an attenuation photomask uses, instead of chromium, a material that is semi-transparent to the exposure light and shifts the phase angle of the light by 180°. Though such a design can improve the resolution of device patterns, other problems are caused.
For example, a die seal ring for protecting a die on a wafer is not suitably formed with an attenuation photomask. Referring to FIG. 1, when a dielectric layer 100 is to be patterned into a part of a die seal ring and other structures, the photoresist pattern 210 between two adjacent gaps 102a and 102b or 102b and 102c in the die seal ring area 130 is quite narrow. If an attenuation mask is used to define the photoresist pattern 210, the diffraction of the exposure light will cause some non-predetermined portions of the photoresist layer in the die seal ring area 130 to be exposed, which is called a side lobe effect. Hence, after the development, the photoresist pattern 210 has a small gap 220 therein or is even divided into two thin photoresist rings 210a and 210b, as shown in FIGS. 2-3, so that the dielectric ring structure defined thereby has a small gap therein, or is divided into two thin rings. The thin dielectric ring structure in the die seal ring area 130 will produce a process noise, so that the process signal is easily mis-interpreted. The two thin photoresist rings 210a and 210b may even peel off in the developer flow and fall on the device area 120 or the scribe line area 110, so that the patterned dielectric layer 100 has incorrect patterns.